Home Forums MOCHAbin Forum Software discussion FYI armada-7040-mochabin decompiled DTS file

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    tompusateri
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    /dts-v1/;

    / {
    model = “Globalscale MOCHAbin Development Board”;
    compatible = “globalscale,mochabin”, “marvell,armada7040”, “marvell,armada-ap806-quad”, “marvell,armada-ap806”;
    #address-cells = <0x2>;
    #size-cells = <0x2>;

    aliases {
    serial0 = “/ap806/config-space@f0000000/serial@512000”;
    serial1 = “/ap806/config-space@f0000000/serial@512100”;
    gpio0 = “/ap806/config-space@f0000000/system-controller@6f4000/gpio@1040”;
    spi0 = “/ap806/config-space@f0000000/spi@510600”;
    gpio1 = “/cp0/config-space@f2000000/system-controller@440000/gpio@100”;
    gpio2 = “/cp0/config-space@f2000000/system-controller@440000/gpio@140”;
    spi1 = “/cp0/config-space@f2000000/spi@700600”;
    spi2 = “/cp0/config-space@f2000000/spi@700680”;
    ethernet0 = “/cp0/config-space@f2000000/ethernet@0/eth0”;
    ethernet1 = “/cp0/config-space@f2000000/ethernet@0/eth1”;
    ethernet2 = “/cp0/config-space@f2000000/ethernet@0/eth2”;
    ethernet3 = “/cp0/config-space@f2000000/mdio@12a200/switch0@1/ports/port@1”;
    ethernet4 = “/cp0/config-space@f2000000/mdio@12a200/switch0@1/ports/port@2”;
    ethernet5 = “/cp0/config-space@f2000000/mdio@12a200/switch0@1/ports/port@3”;
    ethernet6 = “/cp0/config-space@f2000000/mdio@12a200/switch0@1/ports/port@4”;
    };

    psci {
    compatible = “arm,psci-0.2”;
    method = “smc”;
    };

    reserved-memory {
    #address-cells = <0x2>;
    #size-cells = <0x2>;
    ranges;

    psci-area@4000000 {
    reg = <0x0 0x4000000 0x0 0x200000>;
    no-map;
    };
    };

    ap806 {
    #address-cells = <0x2>;
    #size-cells = <0x2>;
    compatible = “simple-bus”;
    interrupt-parent = <0x1>;
    ranges;

    config-space@f0000000 {
    #address-cells = <0x1>;
    #size-cells = <0x1>;
    compatible = “simple-bus”;
    ranges = <0x0 0x0 0xf0000000 0x1000000>;

    interrupt-controller@210000 {
    compatible = “arm,gic-400”;
    #interrupt-cells = <0x3>;
    #address-cells = <0x1>;
    #size-cells = <0x1>;
    ranges;
    interrupt-controller;
    interrupts = <0x1 0x9 0xf04>;
    reg = <0x210000 0x10000 0x220000 0x20000 0x240000 0x20000 0x260000 0x20000>;
    phandle = <0x1>;

    v2m@280000 {
    compatible = “arm,gic-v2m-frame”;
    msi-controller;
    reg = <0x280000 0x1000>;
    arm,msi-base-spi = <0xa0>;
    arm,msi-num-spis = <0x20>;
    phandle = <0x3>;
    };

    v2m@290000 {
    compatible = “arm,gic-v2m-frame”;
    msi-controller;
    reg = <0x290000 0x1000>;
    arm,msi-base-spi = <0xc0>;
    arm,msi-num-spis = <0x20>;
    };

    v2m@2a0000 {
    compatible = “arm,gic-v2m-frame”;
    msi-controller;
    reg = <0x2a0000 0x1000>;
    arm,msi-base-spi = <0xe0>;
    arm,msi-num-spis = <0x20>;
    };

    v2m@2b0000 {
    compatible = “arm,gic-v2m-frame”;
    msi-controller;
    reg = <0x2b0000 0x1000>;
    arm,msi-base-spi = <0x100>;
    arm,msi-num-spis = <0x20>;
    };
    };

    timer {
    compatible = “arm,armv8-timer”;
    interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
    };

    pmu {
    compatible = “arm,cortex-a72-pmu”;
    interrupt-parent = <0x2>;
    interrupts = <0x11>;
    };

    odmi@300000 {
    compatible = “marvell,odmi-controller”;
    interrupt-controller;
    msi-controller;
    marvell,odmi-frames = <0x4>;
    reg = <0x300000 0x4000 0x304000 0x4000 0x308000 0x4000 0x30c000 0x4000>;
    marvell,spi-base = <0x80 0x88 0x90 0x98>;
    };

    gicp@3f0040 {
    compatible = “marvell,ap806-gicp”;
    reg = <0x3f0040 0x10>;
    marvell,spi-ranges = <0x40 0x40 0x120 0x40>;
    msi-controller;
    phandle = <0x25>;
    };

    interrupt-controller@3f0100 {
    compatible = “marvell,armada-8k-pic”;
    reg = <0x3f0100 0x10>;
    #interrupt-cells = <0x1>;
    interrupt-controller;
    interrupts = <0x1 0xf 0x4>;
    phandle = <0x2>;
    };

    interrupt-controller@3f0200 {
    compatible = “marvell,ap806-sei”;
    reg = <0x3f0200 0x40>;
    interrupts = <0x0 0x0 0x4>;
    #interrupt-cells = <0x1>;
    interrupt-controller;
    msi-controller;
    phandle = <0x7>;
    };

    xor@400000 {
    compatible = “marvell,armada-7k-xor”, “marvell,xor-v2”;
    reg = <0x400000 0x1000 0x410000 0x1000>;
    msi-parent = <0x3>;
    clocks = <0x4 0x3>;
    dma-coherent;
    };

    xor@420000 {
    compatible = “marvell,armada-7k-xor”, “marvell,xor-v2”;
    reg = <0x420000 0x1000 0x430000 0x1000>;
    msi-parent = <0x3>;
    clocks = <0x4 0x3>;
    dma-coherent;
    };

    xor@440000 {
    compatible = “marvell,armada-7k-xor”, “marvell,xor-v2”;
    reg = <0x440000 0x1000 0x450000 0x1000>;
    msi-parent = <0x3>;
    clocks = <0x4 0x3>;
    dma-coherent;
    };

    xor@460000 {
    compatible = “marvell,armada-7k-xor”, “marvell,xor-v2”;
    reg = <0x460000 0x1000 0x470000 0x1000>;
    msi-parent = <0x3>;
    clocks = <0x4 0x3>;
    dma-coherent;
    };

    spi@510600 {
    compatible = “marvell,armada-380-spi”;
    reg = <0x510600 0x50>;
    #address-cells = <0x1>;
    #size-cells = <0x0>;
    interrupts = <0x0 0x15 0x4>;
    clocks = <0x4 0x3>;
    status = “disabled”;
    };

    i2c@511000 {
    compatible = “marvell,mv78230-i2c”;
    reg = <0x511000 0x20>;
    #address-cells = <0x1>;
    #size-cells = <0x0>;
    interrupts = <0x0 0x14 0x4>;
    timeout-ms = <0x3e8>;
    clocks = <0x4 0x3>;
    status = “disabled”;
    };

    serial@512000 {
    compatible = “snps,dw-apb-uart”;
    reg = <0x512000 0x100>;
    reg-shift = <0x2>;
    interrupts = <0x0 0x13 0x4>;
    reg-io-width = <0x1>;
    clocks = <0x4 0x3>;
    status = “okay”;
    pinctrl-0 = <0x5>;
    pinctrl-names = “default”;
    };

    serial@512100 {
    compatible = “snps,dw-apb-uart”;
    reg = <0x512100 0x100>;
    reg-shift = <0x2>;
    interrupts = <0x0 0x1d 0x4>;
    reg-io-width = <0x1>;
    clocks = <0x4 0x3>;
    status = “disabled”;
    };

    watchdog@610000 {
    compatible = “arm,sbsa-gwdt”;
    reg = <0x610000 0x1000 0x600000 0x1000>;
    interrupts = <0x0 0x2 0x4>;
    };

    sdhci@6e0000 {
    compatible = “marvell,armada-ap806-sdhci”;
    reg = <0x6e0000 0x300>;
    interrupts = <0x0 0x10 0x4>;
    clock-names = “core”;
    clocks = <0x4 0x4>;
    dma-coherent;
    marvell,xenon-phy-slow-mode;
    status = “okay”;
    bus-width = <0x4>;
    no-1-8-v;
    non-removable;
    };

    system-controller@6f4000 {
    compatible = “syscon”, “simple-mfd”;
    reg = <0x6f4000 0x2000>;

    clock {
    compatible = “marvell,ap806-clock”;
    #clock-cells = <0x1>;
    phandle = <0x4>;
    };

    pinctrl {
    compatible = “marvell,ap806-pinctrl”;
    phandle = <0x6>;

    uart0-pins {
    marvell,pins = “mpp11”, “mpp19”;
    marvell,function = “uart0”;
    phandle = <0x5>;
    };
    };

    gpio@1040 {
    compatible = “marvell,armada-8k-gpio”;
    offset = <0x1040>;
    ngpios = <0x14>;
    gpio-controller;
    #gpio-cells = <0x2>;
    gpio-ranges = <0x6 0x0 0x0 0x14>;
    marvell,pwm-offset = <0x10c0>;
    #pwm-cells = <0x2>;
    clocks = <0x4 0x3>;
    };
    };

    system-controller@6f8000 {
    compatible = “syscon”, “simple-mfd”;
    reg = <0x6f8000 0x1000>;
    #address-cells = <0x1>;
    #size-cells = <0x1>;

    clock-cpu@278 {
    compatible = “marvell,ap806-cpu-clock”;
    clocks = <0x4 0x0 0x4 0x1>;
    #clock-cells = <0x1>;
    reg = <0x278 0xa30>;
    phandle = <0x16>;
    };

    thermal-sensor@80 {
    compatible = “marvell,armada-ap806-thermal”;
    reg = <0x80 0x10>;
    interrupt-parent = <0x7>;
    interrupts = <0x12>;
    #thermal-sensor-cells = <0x1>;
    phandle = <0x8>;
    };
    };
    };
    };

    thermal-zones {

    ap-thermal-ic {
    polling-delay-passive = <0x0>;
    polling-delay = <0x0>;
    thermal-sensors = <0x8 0x0>;

    trips {

    ap-crit {
    temperature = <0x186a0>;
    hysteresis = <0x7d0>;
    type = “critical”;
    };
    };

    cooling-maps {
    };
    };

    ap-thermal-cpu0 {
    polling-delay-passive = <0x3e8>;
    polling-delay = <0x3e8>;
    thermal-sensors = <0x8 0x1>;

    trips {

    cpu0-hot {
    temperature = <0x14c08>;
    hysteresis = <0x7d0>;
    type = “passive”;
    phandle = <0x9>;
    };

    cpu0-emerg {
    temperature = <0x17318>;
    hysteresis = <0x7d0>;
    type = “passive”;
    phandle = <0xc>;
    };
    };

    cooling-maps {

    map0-hot {
    trip = <0x9>;
    cooling-device = <0xa 0x1 0x2 0xb 0x1 0x2>;
    };

    map0-ermerg {
    trip = <0xc>;
    cooling-device = <0xa 0x3 0x3 0xb 0x3 0x3>;
    };
    };
    };

    ap-thermal-cpu1 {
    polling-delay-passive = <0x3e8>;
    polling-delay = <0x3e8>;
    thermal-sensors = <0x8 0x2>;

    trips {

    cpu1-hot {
    temperature = <0x14c08>;
    hysteresis = <0x7d0>;
    type = “passive”;
    phandle = <0xd>;
    };

    cpu1-emerg {
    temperature = <0x17318>;
    hysteresis = <0x7d0>;
    type = “passive”;
    phandle = <0xe>;
    };
    };

    cooling-maps {

    map1-hot {
    trip = <0xd>;
    cooling-device = <0xa 0x1 0x2 0xb 0x1 0x2>;
    };

    map1-emerg {
    trip = <0xe>;
    cooling-device = <0xa 0x3 0x3 0xb 0x3 0x3>;
    };
    };
    };

    ap-thermal-cpu2 {
    polling-delay-passive = <0x3e8>;
    polling-delay = <0x3e8>;
    thermal-sensors = <0x8 0x3>;

    trips {

    cpu2-hot {
    temperature = <0x14c08>;
    hysteresis = <0x7d0>;
    type = “passive”;
    phandle = <0xf>;
    };

    cpu2-emerg {
    temperature = <0x17318>;
    hysteresis = <0x7d0>;
    type = “passive”;
    phandle = <0x12>;
    };
    };

    cooling-maps {

    map2-hot {
    trip = <0xf>;
    cooling-device = <0x10 0x1 0x2 0x11 0x1 0x2>;
    };

    map2-emerg {
    trip = <0x12>;
    cooling-device = <0x10 0x3 0x3 0x11 0x3 0x3>;
    };
    };
    };

    ap-thermal-cpu3 {
    polling-delay-passive = <0x3e8>;
    polling-delay = <0x3e8>;
    thermal-sensors = <0x8 0x4>;

    trips {

    cpu3-hot {
    temperature = <0x14c08>;
    hysteresis = <0x7d0>;
    type = “passive”;
    phandle = <0x13>;
    };

    cpu3-emerg {
    temperature = <0x17318>;
    hysteresis = <0x7d0>;
    type = “passive”;
    phandle = <0x14>;
    };
    };

    cooling-maps {

    map3-bhot {
    trip = <0x13>;
    cooling-device = <0x10 0x1 0x2 0x11 0x1 0x2>;
    };

    map3-emerg {
    trip = <0x14>;
    cooling-device = <0x10 0x3 0x3 0x11 0x3 0x3>;
    };
    };
    };

    cp0-thermal-ic {
    polling-delay-passive = <0x0>;
    polling-delay = <0x0>;
    thermal-sensors = <0x15 0x0>;

    trips {

    crit {
    temperature = <0x186a0>;
    hysteresis = <0x7d0>;
    type = “critical”;
    };
    };

    cooling-maps {
    };
    };
    };

    cpus {
    #address-cells = <0x1>;
    #size-cells = <0x0>;

    cpu@0 {
    device_type = “cpu”;
    compatible = “arm,cortex-a72”;
    reg = <0x0>;
    enable-method = “psci”;
    #cooling-cells = <0x2>;
    clocks = <0x16 0x0>;
    phandle = <0xa>;
    };

    cpu@1 {
    device_type = “cpu”;
    compatible = “arm,cortex-a72”;
    reg = <0x1>;
    enable-method = “psci”;
    #cooling-cells = <0x2>;
    clocks = <0x16 0x0>;
    phandle = <0xb>;
    };

    cpu@100 {
    device_type = “cpu”;
    compatible = “arm,cortex-a72”;
    reg = <0x100>;
    enable-method = “psci”;
    #cooling-cells = <0x2>;
    clocks = <0x16 0x1>;
    phandle = <0x10>;
    };

    cpu@101 {
    device_type = “cpu”;
    compatible = “arm,cortex-a72”;
    reg = <0x101>;
    enable-method = “psci”;
    #cooling-cells = <0x2>;
    clocks = <0x16 0x1>;
    phandle = <0x11>;
    };
    };

    cp0 {
    #address-cells = <0x2>;
    #size-cells = <0x2>;
    compatible = “simple-bus”;
    interrupt-parent = <0x17>;
    ranges;

    config-space@f2000000 {
    #address-cells = <0x1>;
    #size-cells = <0x1>;
    compatible = “simple-bus”;
    ranges = <0x0 0x0 0xf2000000 0x2000000>;

    ethernet@0 {
    compatible = “marvell,armada-7k-pp22”;
    reg = <0x0 0x100000 0x129000 0xb000>;
    clocks = <0x18 0x1 0x3 0x18 0x1 0x9 0x18 0x1 0x5 0x18 0x1 0x6 0x18 0x1 0x12>;
    clock-names = “pp_clk”, “gop_clk”, “mg_clk”, “mg_core_clk”, “axi_clk”;
    marvell,system-controller = <0x19>;
    status = “okay”;
    dma-coherent;

    eth0 {
    interrupts = <0x27 0x4 0x2b 0x4 0x2f 0x4 0x33 0x4 0x37 0x4 0x3b 0x4 0x3f 0x4 0x43 0x4 0x47 0x4 0x81 0x4>;
    interrupt-names = “hif0”, “hif1”, “hif2”, “hif3”, “hif4”, “hif5”, “hif6”, “hif7”, “hif8”, “link”;
    port-id = <0x0>;
    gop-port-id = <0x0>;
    status = “okay”;
    phy-mode = “10gbase-kr”;
    phys = <0x1a 0x0>;
    managed = “in-band-status”;
    sfp = <0x1b>;
    };

    eth1 {
    interrupts = <0x28 0x4 0x2c 0x4 0x30 0x4 0x34 0x4 0x38 0x4 0x3c 0x4 0x40 0x4 0x44 0x4 0x48 0x4 0x80 0x4>;
    interrupt-names = “hif0”, “hif1”, “hif2”, “hif3”, “hif4”, “hif5”, “hif6”, “hif7”, “hif8”, “link”;
    port-id = <0x1>;
    gop-port-id = <0x2>;
    status = “okay”;
    phy-mode = “2500base-x”;
    phys = <0x1c 0x1>;
    phandle = <0x24>;

    fixed-link {
    speed = <0x9c4>;
    full-duplex;
    };
    };

    eth2 {
    interrupts = <0x29 0x4 0x2d 0x4 0x31 0x4 0x35 0x4 0x39 0x4 0x3d 0x4 0x41 0x4 0x45 0x4 0x49 0x4 0x7f 0x4>;
    interrupt-names = “hif0”, “hif1”, “hif2”, “hif3”, “hif4”, “hif5”, “hif6”, “hif7”, “hif8”, “link”;
    port-id = <0x2>;
    gop-port-id = <0x3>;
    status = “okay”;
    pinctrl-names = “default”;
    pinctrl-0 = <0x1d>;
    phy = <0x1e>;
    phy-mode = “rgmii-id”;
    };
    };

    phy@120000 {
    compatible = “marvell,comphy-cp110”;
    reg = <0x120000 0x6000>;
    marvell,system-controller = <0x19>;
    clocks = <0x18 0x1 0x5 0x18 0x1 0x6 0x18 0x1 0x12>;
    clock-names = “mg_clk”, “mg_core_clk”, “axi_clk”;
    #address-cells = <0x1>;
    #size-cells = <0x0>;

    phy@0 {
    reg = <0x0>;
    #phy-cells = <0x1>;
    phandle = <0x1c>;
    };

    phy@1 {
    reg = <0x1>;
    #phy-cells = <0x1>;
    phandle = <0x28>;
    };

    phy@2 {
    reg = <0x2>;
    #phy-cells = <0x1>;
    phandle = <0x29>;
    };

    phy@3 {
    reg = <0x3>;
    #phy-cells = <0x1>;
    phandle = <0x2a>;
    };

    phy@4 {
    reg = <0x4>;
    #phy-cells = <0x1>;
    phandle = <0x1a>;
    };

    phy@5 {
    reg = <0x5>;
    #phy-cells = <0x1>;
    phandle = <0x33>;
    };
    };

    mdio@12a200 {
    #address-cells = <0x1>;
    #size-cells = <0x0>;
    compatible = “marvell,orion-mdio”;
    reg = <0x12a200 0x10>;
    clocks = <0x18 0x1 0x9 0x18 0x1 0x5 0x18 0x1 0x6 0x18 0x1 0x12>;
    status = “okay”;

    ethernet-phy@0 {
    reg = <0x1>;
    sfp = <0x1f>;
    phandle = <0x1e>;
    };

    switch0@1 {
    compatible = “marvell,mv88e6085”;
    #address-cells = <0x1>;
    #size-cells = <0x0>;
    reg = <0x3>;
    dsa,member = <0x0 0x0>;

    ports {
    #address-cells = <0x1>;
    #size-cells = <0x0>;

    port@1 {
    reg = <0x1>;
    label = “lan0”;
    phy-handle = <0x20>;
    };

    port@2 {
    reg = <0x2>;
    label = “lan1”;
    phy-handle = <0x21>;
    };

    port@3 {
    reg = <0x3>;
    label = “lan2”;
    phy-handle = <0x22>;
    };

    port@4 {
    reg = <0x4>;
    label = “lan3”;
    phy-handle = <0x23>;
    };

    port@5 {
    reg = <0x5>;
    label = “cpu”;
    ethernet = <0x24>;
    phy-mode = “2500base-x”;
    managed = “in-band-status”;
    };
    };

    mdio {
    #address-cells = <0x1>;
    #size-cells = <0x0>;

    switch0phy1@11 {
    reg = <0x11>;
    phandle = <0x20>;
    };

    switch0phy2@12 {
    reg = <0x12>;
    phandle = <0x21>;
    };

    switch0phy3@13 {
    reg = <0x13>;
    phandle = <0x22>;
    };

    switch0phy4@14 {
    reg = <0x14>;
    phandle = <0x23>;
    };
    };
    };
    };

    mdio@12a600 {
    #address-cells = <0x1>;
    #size-cells = <0x0>;
    compatible = “marvell,xmdio”;
    reg = <0x12a600 0x10>;
    clocks = <0x18 0x1 0x5 0x18 0x1 0x6 0x18 0x1 0x12>;
    status = “disabled”;
    };

    interrupt-controller@1e0000 {
    compatible = “marvell,cp110-icu”;
    reg = <0x1e0000 0x440>;
    #address-cells = <0x1>;
    #size-cells = <0x1>;

    interrupt-controller@10 {
    compatible = “marvell,cp110-icu-nsr”;
    reg = <0x10 0x20>;
    #interrupt-cells = <0x2>;
    interrupt-controller;
    msi-parent = <0x25>;
    phandle = <0x17>;
    };

    interrupt-controller@50 {
    compatible = “marvell,cp110-icu-sei”;
    reg = <0x50 0x10>;
    #interrupt-cells = <0x2>;
    interrupt-controller;
    msi-parent = <0x7>;
    phandle = <0x27>;
    };
    };

    rtc@284000 {
    compatible = “marvell,armada-8k-rtc”;
    reg = <0x284000 0x20 0x284080 0x24>;
    reg-names = “rtc”, “rtc-soc”;
    interrupts = <0x4d 0x4>;
    };

    system-controller@440000 {
    compatible = “syscon”, “simple-mfd”;
    reg = <0x440000 0x2000>;
    phandle = <0x19>;

    clock {
    compatible = “marvell,cp110-clock”;
    #clock-cells = <0x2>;
    phandle = <0x18>;
    };

    gpio@100 {
    compatible = “marvell,armada-8k-gpio”;
    offset = <0x100>;
    ngpios = <0x20>;
    gpio-controller;
    #gpio-cells = <0x2>;
    gpio-ranges = <0x26 0x0 0x0 0x20>;
    marvell,pwm-offset = <0x1f0>;
    #pwm-cells = <0x2>;
    interrupt-controller;
    interrupts = <0x56 0x4 0x55 0x4 0x54 0x4 0x53 0x4>;
    #interrupt-cells = <0x2>;
    clock-names = “core”, “axi”;
    clocks = <0x18 0x1 0x15 0x18 0x1 0x11>;
    status = “okay”;
    phandle = <0x2f>;
    };

    gpio@140 {
    compatible = “marvell,armada-8k-gpio”;
    offset = <0x140>;
    ngpios = <0x1f>;
    gpio-controller;
    #gpio-cells = <0x2>;
    gpio-ranges = <0x26 0x0 0x20 0x1f>;
    marvell,pwm-offset = <0x1f0>;
    #pwm-cells = <0x2>;
    interrupt-controller;
    interrupts = <0x52 0x4 0x51 0x4 0x50 0x4 0x4f 0x4>;
    #interrupt-cells = <0x2>;
    clock-names = “core”, “axi”;
    clocks = <0x18 0x1 0x15 0x18 0x1 0x11>;
    status = “okay”;
    };

    pinctrl {
    compatible = “marvell,armada-7k-pinctrl”;
    phandle = <0x26>;

    nand-pins {
    marvell,pins = “mpp15”, “mpp16”, “mpp17”, “mpp18”, “mpp19”, “mpp20”, “mpp21”, “mpp22”, “mpp23”, “mpp24”, “mpp25”, “mpp26”, “mpp27”;
    marvell,function = “dev”;
    };

    nand-rb {
    marvell,pins = “mpp13”;
    marvell,function = “nf”;
    };

    cp0-uart0-pins {
    marvell,pins = “mpp6”, “mpp7”;
    marvell,function = “uart0”;
    phandle = <0x31>;
    };

    cp0-spi0-pins {
    marvell,pins = “mpp56”, “mpp57”, “mpp58”, “mpp59”;
    marvell,function = “spi0”;
    phandle = <0x2b>;
    };

    cp0-spi1-pins {
    marvell,pins = “mpp13”, “mpp14”, “mpp15”, “mpp16”;
    marvell,function = “spi1”;
    phandle = <0x2c>;
    };

    cp0-i2c0-pins {
    marvell,pins = “mpp37”, “mpp38”;
    marvell,function = “i2c0”;
    phandle = <0x2d>;
    };

    cp0-i2c1-pins {
    marvell,pins = “mpp2”, “mpp3”;
    marvell,function = “i2c1”;
    phandle = <0x30>;
    };

    cp0-rgmii1-pins {
    marvell,pins = “mpp44”, “mpp45”, “mpp46”, “mpp47”, “mpp48”, “mpp49”, “mpp50”, “mpp51”, “mpp52”, “mpp53”, “mpp54”, “mpp55”;
    marvell,function = “ge1”;
    phandle = <0x1d>;
    };

    cp0-pcie-reset-pins {
    marvell,pins = “mpp9”;
    marvell,function = “gpio”;
    phandle = <0x32>;
    };

    is31-sdb-pins {
    marvell,pins = “mpp30”;
    marvell,function = “gpio”;
    phandle = <0x34>;
    };

    pca9554-int-pins {
    marvell,pins = “mpp27”;
    marvell,function = “gpio”;
    phandle = <0x2e>;
    };
    };
    };

    system-controller@400000 {
    compatible = “syscon”, “simple-mfd”;
    reg = <0x400000 0x1000>;
    #address-cells = <0x1>;
    #size-cells = <0x1>;

    thermal-sensor@70 {
    compatible = “marvell,armada-cp110-thermal”;
    reg = <0x70 0x10>;
    interrupts-extended = <0x27 0x74 0x4>;
    #thermal-sensor-cells = <0x1>;
    phandle = <0x15>;
    };
    };

    usb3@500000 {
    compatible = “marvell,armada-8k-xhci”, “generic-xhci”;
    reg = <0x500000 0x4000>;
    dma-coherent;
    interrupts = <0x6a 0x4>;
    clock-names = “core”, “reg”;
    clocks = <0x18 0x1 0x16 0x18 0x1 0x10>;
    status = “okay”;
    phys = <0x28 0x0>;
    phy-names = “cp0-usb3h0-comphy”;
    };

    usb3@510000 {
    compatible = “marvell,armada-8k-xhci”, “generic-xhci”;
    reg = <0x510000 0x4000>;
    dma-coherent;
    interrupts = <0x69 0x4>;
    clock-names = “core”, “reg”;
    clocks = <0x18 0x1 0x17 0x18 0x1 0x10>;
    status = “okay”;
    };

    sata@540000 {
    compatible = “marvell,armada-8k-ahci”, “generic-ahci”;
    reg = <0x540000 0x30000>;
    dma-coherent;
    interrupts = <0x6b 0x4>;
    clocks = <0x18 0x1 0xf 0x18 0x1 0x10>;
    #address-cells = <0x1>;
    #size-cells = <0x0>;
    status = “okay”;

    sata-port@0 {
    reg = <0x0>;
    phys = <0x29 0x0>;
    phy-names = “cp0-sata0-0-phy”;
    };

    sata-port@1 {
    reg = <0x1>;
    phys = <0x2a 0x1>;
    phy-names = “cp0-sata0-1-phy”;
    };
    };

    xor@6a0000 {
    compatible = “marvell,armada-7k-xor”, “marvell,xor-v2”;
    reg = <0x6a0000 0x1000 0x6b0000 0x1000>;
    dma-coherent;
    msi-parent = <0x3>;
    clock-names = “core”, “reg”;
    clocks = <0x18 0x1 0x8 0x18 0x1 0xe>;
    };

    xor@6c0000 {
    compatible = “marvell,armada-7k-xor”, “marvell,xor-v2”;
    reg = <0x6c0000 0x1000 0x6d0000 0x1000>;
    dma-coherent;
    msi-parent = <0x3>;
    clock-names = “core”, “reg”;
    clocks = <0x18 0x1 0x7 0x18 0x1 0xe>;
    };

    spi@700600 {
    compatible = “marvell,armada-380-spi”;
    reg = <0x700600 0x50>;
    #address-cells = <0x1>;
    #size-cells = <0x0>;
    clock-names = “core”, “axi”;
    clocks = <0x18 0x1 0x15 0x18 0x1 0x11>;
    status = “okay”;
    pinctrl-names = “default”;
    pinctrl-0 = <0x2b>;
    };

    spi@700680 {
    compatible = “marvell,armada-380-spi”;
    reg = <0x700680 0x50>;
    #address-cells = <0x1>;
    #size-cells = <0x0>;
    clock-names = “core”, “axi”;
    clocks = <0x18 0x1 0x15 0x18 0x1 0x11>;
    status = “okay”;
    pinctrl-names = “default”;
    pinctrl-0 = <0x2c>;

    spi-flash@0 {
    #address-cells = <0x1>;
    #size-cells = <0x1>;
    compatible = “jedec,spi-nor”;
    reg = <0x0>;
    spi-max-frequency = <0x1312d00>;

    partitions {
    compatible = “fixed-partitions”;
    #address-cells = <0x1>;
    #size-cells = <0x1>;

    partition@0 {
    label = “u-boot”;
    reg = <0x0 0x3e0000>;
    };

    partition@3e0000 {
    label = “hw-info”;
    reg = <0x3e0000 0x10000>;
    read-only;
    };

    partition@3f0000 {
    label = “u-boot-env”;
    reg = <0x3f0000 0x10000>;
    };
    };
    };
    };

    i2c@701000 {
    compatible = “marvell,mv78230-i2c”;
    reg = <0x701000 0x20>;
    #address-cells = <0x1>;
    #size-cells = <0x0>;
    interrupts = <0x78 0x4>;
    clock-names = “core”, “reg”;
    clocks = <0x18 0x1 0x15 0x18 0x1 0x11>;
    status = “okay”;
    pinctrl-names = “default”;
    pinctrl-0 = <0x2d>;
    clock-frequency = <0x186a0>;
    phandle = <0x37>;

    pca9554@39 {
    pinctrl-names = “default”;
    pinctrl-0 = <0x2e>;
    compatible = “nxp,pca9554”;
    reg = <0x39>;
    interrupt-parent = <0x2f>;
    interrupts = <0x1b 0x2>;
    interrupt-controller;
    #interrupt-cells = <0x2>;
    gpio-controller;
    #gpio-cells = <0x2>;
    phandle = <0x36>;
    };
    };

    i2c@701100 {
    compatible = “marvell,mv78230-i2c”;
    reg = <0x701100 0x20>;
    #address-cells = <0x1>;
    #size-cells = <0x0>;
    interrupts = <0x79 0x4>;
    clock-names = “core”, “reg”;
    clocks = <0x18 0x1 0x15 0x18 0x1 0x11>;
    status = “okay”;
    pinctrl-names = “default”;
    pinctrl-0 = <0x30>;
    clock-frequency = <0x186a0>;
    phandle = <0x35>;

    leds@64 {
    compatible = “issi,is31fl3199”;
    #address-cells = <0x1>;
    #size-cells = <0x0>;
    reg = <0x64>;

    led@1 {
    label = “led1:red”;
    reg = <0x1>;
    led-max-microamp = <0x4e20>;
    };

    led@2 {
    label = “led1:green”;
    reg = <0x2>;
    };

    led@3 {
    label = “led1:blue”;
    reg = <0x3>;
    };

    led@4 {
    label = “led2:red”;
    reg = <0x4>;
    };

    led@5 {
    label = “led2:green”;
    reg = <0x5>;
    };

    led@6 {
    label = “led2:blue”;
    reg = <0x6>;
    };

    led@7 {
    label = “led3:red”;
    reg = <0x7>;
    };

    led@8 {
    label = “led3:green”;
    reg = <0x8>;
    };

    led@9 {
    label = “led3:blue”;
    reg = <0x9>;
    };
    };
    };

    serial@702000 {
    compatible = “snps,dw-apb-uart”;
    reg = <0x702000 0x100>;
    reg-shift = <0x2>;
    interrupts = <0x7a 0x4>;
    reg-io-width = <0x1>;
    clock-names = “baudclk”, “apb_pclk”;
    clocks = <0x18 0x1 0x15 0x18 0x1 0x11>;
    status = “okay”;
    pinctrl-names = “default”;
    pinctrl-0 = <0x31>;
    };

    serial@702100 {
    compatible = “snps,dw-apb-uart”;
    reg = <0x702100 0x100>;
    reg-shift = <0x2>;
    interrupts = <0x7b 0x4>;
    reg-io-width = <0x1>;
    clock-names = “baudclk”, “apb_pclk”;
    clocks = <0x18 0x1 0x15 0x18 0x1 0x11>;
    status = “disabled”;
    };

    serial@702200 {
    compatible = “snps,dw-apb-uart”;
    reg = <0x702200 0x100>;
    reg-shift = <0x2>;
    interrupts = <0x7c 0x4>;
    reg-io-width = <0x1>;
    clock-names = “baudclk”, “apb_pclk”;
    clocks = <0x18 0x1 0x15 0x18 0x1 0x11>;
    status = “disabled”;
    };

    serial@702300 {
    compatible = “snps,dw-apb-uart”;
    reg = <0x702300 0x100>;
    reg-shift = <0x2>;
    interrupts = <0x7d 0x4>;
    reg-io-width = <0x1>;
    clock-names = “baudclk”, “apb_pclk”;
    clocks = <0x18 0x1 0x15 0x18 0x1 0x11>;
    status = “disabled”;
    };

    nand@720000 {
    compatible = “marvell,armada-8k-nand-controller”, “marvell,armada370-nand-controller”;
    reg = <0x720000 0x54>;
    #address-cells = <0x1>;
    #size-cells = <0x0>;
    interrupts = <0x73 0x4>;
    clock-names = “core”, “reg”;
    clocks = <0x18 0x1 0x2 0x18 0x1 0x11>;
    marvell,system-controller = <0x19>;
    status = “disabled”;
    };

    trng@760000 {
    compatible = “marvell,armada-8k-rng”, “inside-secure,safexcel-eip76”;
    reg = <0x760000 0x7d>;
    interrupts = <0x5f 0x4>;
    clock-names = “core”, “reg”;
    clocks = <0x18 0x1 0x19 0x18 0x1 0x11>;
    status = “okay”;
    };

    sdhci@780000 {
    compatible = “marvell,armada-cp110-sdhci”;
    reg = <0x780000 0x300>;
    interrupts = <0x1b 0x4>;
    clock-names = “core”, “axi”;
    clocks = <0x18 0x1 0x4 0x18 0x1 0x12>;
    dma-coherent;
    status = “disabled”;
    };

    crypto@800000 {
    compatible = “inside-secure,safexcel-eip197b”;
    reg = <0x800000 0x200000>;
    interrupts = <0x57 0x4 0x58 0x4 0x59 0x4 0x5a 0x4 0x5b 0x4 0x5c 0x4>;
    interrupt-names = “mem”, “ring0”, “ring1”, “ring2”, “ring3”, “eip”;
    clock-names = “core”, “reg”;
    clocks = <0x18 0x1 0x1a 0x18 0x1 0x11>;
    dma-coherent;
    status = “okay”;
    };
    };

    pcie@f2600000 {
    compatible = “marvell,armada8k-pcie”, “snps,dw-pcie”;
    reg = <0x0 0xf2600000 0x0 0x10000 0x0 0xf6f00000 0x0 0x80000>;
    reg-names = “ctrl”, “config”;
    #address-cells = <0x3>;
    #size-cells = <0x2>;
    #interrupt-cells = <0x1>;
    device_type = “pci”;
    dma-coherent;
    msi-parent = <0x3>;
    bus-range = <0x0 0xff>;
    ranges = <0x81000000 0x0 0xf9000000 0x0 0xf9000000 0x0 0x10000 0x82000000 0x0 0xf6000000 0x0 0xf6000000 0x0 0xf00000>;
    interrupt-map-mask = <0x0 0x0 0x0 0x0>;
    interrupt-map = <0x0 0x0 0x0 0x0 0x17 0x16 0x4>;
    interrupts = <0x16 0x4>;
    num-lanes = <0x1>;
    clock-names = “core”, “reg”;
    clocks = <0x18 0x1 0xd 0x18 0x1 0xe>;
    status = “disabled”;
    };

    pcie@f2620000 {
    compatible = “marvell,armada8k-pcie”, “snps,dw-pcie”;
    reg = <0x0 0xf2620000 0x0 0x10000 0x0 0xf7f00000 0x0 0x80000>;
    reg-names = “ctrl”, “config”;
    #address-cells = <0x3>;
    #size-cells = <0x2>;
    #interrupt-cells = <0x1>;
    device_type = “pci”;
    dma-coherent;
    msi-parent = <0x3>;
    bus-range = <0x0 0xff>;
    ranges = <0x81000000 0x0 0xf9010000 0x0 0xf9010000 0x0 0x10000 0x82000000 0x0 0xf7000000 0x0 0xf7000000 0x0 0xf00000>;
    interrupt-map-mask = <0x0 0x0 0x0 0x0>;
    interrupt-map = <0x0 0x0 0x0 0x0 0x17 0x18 0x4>;
    interrupts = <0x18 0x4>;
    num-lanes = <0x1>;
    clock-names = “core”, “reg”;
    clocks = <0x18 0x1 0xb 0x18 0x1 0xe>;
    status = “disabled”;
    };

    pcie@f2640000 {
    compatible = “marvell,armada8k-pcie”, “snps,dw-pcie”;
    reg = <0x0 0xf2640000 0x0 0x10000 0x0 0xf8f00000 0x0 0x80000>;
    reg-names = “ctrl”, “config”;
    #address-cells = <0x3>;
    #size-cells = <0x2>;
    #interrupt-cells = <0x1>;
    device_type = “pci”;
    dma-coherent;
    msi-parent = <0x3>;
    bus-range = <0x0 0xff>;
    ranges = <0x81000000 0x0 0xf9020000 0x0 0xf9020000 0x0 0x10000 0x82000000 0x0 0xf8000000 0x0 0xf8000000 0x0 0xf00000>;
    interrupt-map-mask = <0x0 0x0 0x0 0x0>;
    interrupt-map = <0x0 0x0 0x0 0x0 0x17 0x17 0x4>;
    interrupts = <0x17 0x4>;
    num-lanes = <0x1>;
    clock-names = “core”, “reg”;
    clocks = <0x18 0x1 0xc 0x18 0x1 0xe>;
    status = “okay”;
    pinctrl-names = “default”;
    pinctrl-0 = <0x32>;
    phys = <0x33 0x2>;
    phy-names = “cp0-pcie2-x1-phy”;
    reset-gpio = <0x2f 0x9 0x1>;
    };
    };

    memory@0 {
    device_type = “memory”;
    reg = <0x0 0x0 0x0 0x80000000>;
    };

    chosen {
    stdout-path = “serial0:115200n8”;
    };

    reg-is31-led {
    compatible = “regulator-fixed”;
    pinctrl-names = “default”;
    pinctrl-0 = <0x34>;
    regulator-name = “is31-led”;
    regulator-min-microvolt = <0x325aa0>;
    regulator-max-microvolt = <0x325aa0>;
    enable-active-high;
    regulator-always-on;
    gpio = <0x2f 0x1e 0x0>;
    status = “okay”;
    };

    sfp-eth0 {
    compatible = “sff,sfp”;
    i2c-bus = <0x35>;
    los-gpio = <0x36 0x3 0x0>;
    mod-def0-gpio = <0x36 0x2 0x1>;
    tx-disable-gpio = <0x36 0x1 0x0>;
    tx-fault-gpio = <0x36 0x0 0x0>;
    status = “okay”;
    phandle = <0x1b>;
    };

    sfp-eth2 {
    compatible = “sff,sfp”;
    i2c-bus = <0x37>;
    los-gpio = <0x36 0x7 0x0>;
    mod-def0-gpio = <0x36 0x6 0x1>;
    tx-disable-gpio = <0x36 0x5 0x0>;
    tx-fault-gpio = <0x36 0x4 0x0>;
    status = “okay”;
    phandle = <0x1f>;
    };
    };

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