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I have tried 6 mini PCIe cards and not a single of them gets detected by the ESPRESSObin. I am using ArchLinux ARM with the latest Kernel.
(please ignore the m.2 card)
[ 2.117211] OF: PCI: host bridge /soc/pcie@d0070000 ranges:
[ 2.122931] OF: PCI: MEM 0xe8000000..0xe8ffffff -> 0xe8000000
[ 2.129066] OF: PCI: IO 0xe9000000..0xe900ffff -> 0xe9000000
[ 3.135222] advk-pcie d0070000.pcie: link never came up
[ 3.140693] advk-pcie d0070000.pcie: PCI host bridge to bus 0000:00
[ 3.147069] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 3.152722] pci_bus 0000:00: root bus resource [mem 0xe8000000-0xe8ffffff]
[ 3.159798] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] (bus address [0xe9000000-0xe900ffff])
[ 4.118959] advk-pcie d0070000.pcie: config read/write timed out
Is the slot broken or what’s going on?
Mine detect few ath9 cards Atheros 92xx … have you update u-boot to 17.10?
I got the mPCIe slot working now. I had to apply this patch to the kernel:
--- drivers/pci/host/pci-aardvark.c 2018-03-02 21:59:56.553041000 +0100
+++ drivers/pci/host/pci-aardvark.c 2018-03-02 22:00:12.083041000 +0100
@@ -307,10 +307,10 @@
advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);
- /* Set GEN2 */
+ /* Set GEN1 */
reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
reg &= ~PCIE_GEN_SEL_MSK;
- reg |= SPEED_GEN_2;
+ reg |= SPEED_GEN_1;
advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
/* Set lane X1 */
Why on earth is this not done by Marvell? I had to do the same for OpenWRT.
Hello! Following patch https://email@example.com/ should fix this problem. It configures controller GEN speed based on speed of connected card. So for GEN1 cards is configured SPEED_GEN_1 and for GEN2 cards is configured SPEED_GEN_2.
If you still have more PCIe cards available, could you test them if they finally work with above mentioned patch series on Espressobin?
holy, thanks for sharing
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